X
X
R
R
P
P
7
7
7
7
1
1
4
4
 
 
Q
Q
u
u
a
a
d
d
 
 
C
C
h
h
a
a
n
n
n
n
e
e
l
l
 
 
D
D
i
i
g
g
i
i
t
t
a
a
l
l
 
 
P
P
W
W
M
M
 
 
S
S
t
t
e
e
p
p
 
 
D
D
o
o
w
w
n
n
 
 
C
C
o
o
n
n
t
t
r
r
o
o
l
l
l
l
e
e
r
r
 
 
 
?2011 Exar Corporation
21/29
Rev. 1.1.6
The maximum duty cycle obtained from the table above is programmed by the PowerArchitect
TM
 
software into each of the channels using the SET_DUTY_LIMITER_CHx register. This ensures that
under all conditions (including faults), there will always be sufficient sampling time to measure the
output current. When the duty cycle limit is reached, the output voltage will no longer regulate and
will be clamped based on the maximum duty cycle limit setting.
It is possible for the user to program SET_DUTY_LIMITER_CHx register to a higher value, but the
OCP Fault and OCP WARN flags should then be ignored.
Efficiency
The PWM Switching frequency plays an important role on overall power conversion efficiency. As
the switching frequency increase, the switching losses also increase. Please see the APPLICATION
INFORMATION, Typical Performance Data for further examples.
Component Selection and Frequency
Typically the components become smaller as the frequency increases, as long as the ripple
requirements remain constant. At higher frequency the inductor can be smaller in value and have a
smaller footprint while still maintaining the same current rating.
FREQUENCY SYNCHRONIZATION FUNCTION AND EXTERNAL CLOCK
The user of the XRP7714 can choose to use an external source as the primary clock for the
XRP7714. This function can be configured using the SET_SYNC_MODE_CONFIG register. This
register sets the operation of the XRP7714 when an external clock is required. By selecting the
appropriate bit combination the user can configure the IC to function as a master or a slave when
two or more XRP7714s are used to convert power in a system. Automatic clock selection is also
provided to allow operation even if the external clock fails by switching the IC back to an internal
clock.
External Clock Synchronization
Even when configured to use an external clock, the chip initially powers up with its internal clock.
The user can set the percent target that the frequency detector will use when comparing the
internal clock with the clock frequency input on the GPIO pin. If the external clock frequency is
detected to be within the window specified by the user, then a switchover will occur to the external
clock. If the IC does not find a clock in the specified frequency target range then the external clock
will not be used and the IC will run on the internal clock that was specified by the user. If the
external clock fails the user can chose to have the internal clock take over, using the automatic
switch back mode in the SET_SYNC_MODE_CONFIG register.
 
XRP7714
Configured for
external clock use
CLK_IN
GPIO1
 
Fig. 27:XRP7714 Configured For External Clock Use
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